Day 25: Building it: a 74xx counter + traffic-light FSM on the breadboard
Hands-on build day
Two builds turn this week's theory into blinking hardware. First, a 4-bit counter (synchronous, e.g. a 74161, or a 7490 for decimal) driving a 7-segment display through a decoder — you'll see counting, wrap-around, and terminal count for real. Second, a traffic-light controller as a genuine finite state machine built from 74xx gates and flip-flops, with an Arduino used *only* as the clock source, not for the logic.
Design the traffic light the disciplined way: draw the state diagram (above), pick a state encoding (2 bits for four states), write the next-state and output logic, and only then wire flip-flops + gates. Doing it in that order — diagram → table → logic → wires — is the exact flow you'll follow in RTL, just with a keyboard instead of a breadboard.
Build: counter-on-7-segment + traffic-light FSM
Build both circuits on the breadboard. The counter must display and wrap correctly; the traffic light must cycle through its states on a clock/timer tick using only 74xx logic (Arduino = clock only). Photograph/film both for docs/stage0/ — these are two of your three required breadboard builds.
You just did the RTL flow, in hardware
Diagram → state table → next-state logic → implementation is *identical* to how you'll write an FSM in Verilog (Stage 2). Building one in 74xx first means that when you type always @(posedge clk) later, you already know exactly what silicon it stands for.
Key terms
- 7-segment decoder
- Logic (e.g. a 7447) that converts a 4-bit value into the segment pattern for a decimal digit.
- State encoding
- The bit assignment chosen for FSM states (binary, one-hot, gray).
- Next-state logic
- Combinational logic computing the following state from the current state and inputs.
Ship for Day 25
The traffic-light controller has four states. What is the minimum number of flip-flops needed to encode them in binary?
